This invention relates to integrators.
Integrators have high linearity, wide bandwidth, and low noise characteristics. Integrators, however, require a reset interval to discharge the capacitor in the integrator""s feedback loop which results in significant xe2x80x9cdeadxe2x80x9d times in measurements and harmful transients on the integrator""s input. Additionally, the rapid discharge interval aggravates the problem of dielectric absorption, thereby undermining the lower limit of instrument precision.
Referring to FIG. 1, an integrator 10 includes a feedback loop having a switch 12 in parallel with a feedback capacitor 14. The switch 12 allows the feedback capacitor 14 to discharge when the switch 12 is closed. Placing one or more strings of series resistors and capacitors in parallel with the feedback capacitor 14 with or without the switch 12 reduces at least some of the harmful effects of this discharge. However, even in some arrangements having multiple capacitors, dielectric absorption is still a problem since the charge in the series capacitors is redistributed with the feedback capacitor 14.
In one general aspect of the invention, an apparatus includes a switching circuit, an integrator circuit having a first input for receiving a first signal from the switching circuit, a sensing circuit having a second input for receiving a second signal from the integrator circuit, and a control circuit having an input for receiving a third signal from the sensing circuit and an output for sending a fourth signal to the switching circuit.
Embodiments of this aspect of the invention may include one or more of the following features. The switching circuit includes two sets of two switches (e.g., MOS devices), the two switches in one set being closed when the two switches in the other set are open.
The integrator circuit includes a first integrator and a second integrator having connected inverting terminals. Each of the first integrator and the second integrator have a non-inverting terminal connected to an output of the switching circuit. Each integrator also has an output connected to the non-inverting terminal of the other integrator through a capacitor.
In operation, the first integrator and the second integrator have voltages on respective ones of the inverting and non-inverting terminals which are substantially equal and have output voltages which are complementary.
The apparatus can be used in a wide variety of applications in which low level, precise measurements are required. For example, in one biological application, the first integrator and the second integrator are operated to each introduce an output voltage into a chemical bath on either side of a biological membrane. In this application, the integrator circuit is configured to detect fluctuations of ion channels. In another application, the integrator circuit may be configured for charge detection.
The sensing circuit includes two comparators, each comparator having an inverting terminal connected to the output of an integrator in the integrator circuit and each comparator having a non-inverting terminal for receiving a threshold voltage.
The control circuit includes a D-type flip-flop and a NAND gate having an output connected to a clock terminal of the D-type flip-flop. The NAND gate includes a pair of inputs, each connected to an output of a comparator in the sensing circuit.
In this embodiment, the sensing circuit includes an output connected to the D-type flip-flop to change the state of the D-type flip-flop. The D-type flip-flop includes high and low outputs which correspond to two switching positions of switches in the switching circuit.
The apparatus further includes a differentiator circuit having a fourth input for receiving a fifth signal from the integrator circuit and a fifth input for receiving a sixth signal from the control circuit.
The differentiator circuit includes an inverting terminal and a non-inverting terminal, each connected to an output of one of two integrators in the integrator circuit. In operation, the differentiator circuit receives the complementary voltages output by the integrator circuit and provides a demodulated differentiation bit stream representing the slope of the complementary voltages.
Where a differentiator circuit is used, the control circuit provides the sixth signal which determines which output of which integrator in the integrator circuit that each inverting and non-inverting terminal is connected to.
Among other advantages, the apparatus serves as a chopper stabilizer circuit that minimizes the need for rapid discharging of feedback capacitors in the integrator circuit. This feature is provided by alternating the signal current from the switching circuit to the integrator circuit. Thus, the integrator circuit is allowed to perpetually integrate these incoming current signals (low-level transducer signals) and output a continuous flow of two complementary voltages. In one mode of operation, the sensing circuit detects when one of the complementary voltages reaches a threshold value and notifies the control circuit. The control circuit then responds by sending a signal to the switching circuit. This signal changes the position of switches in the switching circuit, thereby alternating the signal current to the integrator circuit.
In summary, the apparatus eliminates dead time and input transients, compensates for charge injection at the input, and reduces the harmful effects of dielectric absorption. At the same time, the apparatus maintains high linearity, low noise, and wide bandwidth.
In another aspect of the invention, an integrator circuit includes a first integrator and a second integrator having an inverting terminal connected to an inverting terminal of the first integrator. The second integrator also includes a non-inverting terminal connected to an output of the first integrator through a first capacitor, and an output connected to a non-inverting terminal of the first integrator through a second capacitor.
In still another aspect of the invention, a differentiator circuit includes a first input for receiving one of a first signal or a second signal; a second input for receiving the other of the first signal or the second signal; and a third input for receiving a third signal. The third signal determines which of the first input or second input receives the first signal and which of the first input or second input receives the second signal.
Embodiments of this aspect of the invention may include one or more of the following additional features. The first and second signals are complementary voltage signals. The first input and the second input are each connected to an output of an integrator. The third signal includes an output of a control circuit.
The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims.